;-------------------------------------------------------------------------- ; PEEDI target configuration file ; ; Ronetix GmbH ; ; Supported devices : Renesas RA2L1 ; Supported board : Renesas EK-RA2L1 ; ; If Option-Setting Memory at address 0x400 is programmed with wrong ; values, then debug connection is not possible if the the boot mode is ; normal (BM = 1, single chip boot mode). ; In SCI boot mode (BM = 0), debug connection with wrong option-setting ; is possible. ; SCI boot mode should be used to erase the flash. ; ; After ALeERASE command the MCU is in sleep mode. ; A power cycle is required to exit from this mode. ; ; Revision : 1.0 ; ; Date : January 14, 2022 ; ; The file is delivered "AS IS" without warranty or condition of any ; kind, either express, implied or statutory. This includes without ; limitation any warranty or condition with respect to merchantability or ; fitness for any particular purpose, or against the infringements of ; intellectual property rights of others. ; ;-------------------------------------------------------------------------- ;-------------------------------------------------------------------------- ; The following section contains licenses that are required for PEEDI to ; operate. These licenses must be filled before using this file. ; The [LICENSE] section may contain license keys for one or more PEEDIs. ; ; Example: ; [LICENSE] ; KEY = UPDATE_24MAY2013, 1111-1111-1111-1 ; KEY = XXXXX, 2222-2222-2222-2 ; ; The [LICENSE] section may point to an external file which contains ; license keys for one or more PEEDIs. The external file must include ; the text [LICENSE] followed by all keys. ; ; Example: ; [LICENSE] ; FILE = tftp://192.168.1.1/license.txt ; or ; FILE=eep:license.txt ; or ; FILE = ftp://user:password@192.168.1.1/license.txt ; ; ; PEEDI is shipped with license keys stored in "eep:license.txt" and ; printed on a label on the bottom side of PEEDI. ; [LICENSE] FILE = eep:license.txt ;-------------------------------------------------------------------------- [DEBUGGER] PROTOCOL = gdb_remote ; gdb remote REMOTE_PORT = 2000 ; TCP/IP port [TARGET] PLATFORM = Cortex-M_SWD [PLATFORM_Cortex-M_SWD] SWD_CLOCK = 5000 ; SWD Clock in [kHz] RESET_TIME = 20 ; length of RESET pulse in ms CORE0 = Cortex-M CORE0_STARTUP_MODE = RESET ; stop the core immediately after reset CORE0_ENDIAN = LITTLE ; core is little endian CORE0_BREAKMODE = SOFT ; breakpoint mode CORE0_INIT = INIT_RA2L1 CORE0_WORKSPACE = 0x20000000, 0x8000 ; address, lenght in bytes CORE0_FLASH0 = FLASH_RA ;CORE0_LOCKOUT_RECOVERY = RENESAS_RA2 ; used to erase OCDID[3:0] ; Default path to be used if only a file name (without the full path) is ; provided to a PEEDI command or for the FILE parameter in the Flash sections ; Examples: ; In a console: ; "flash prog tftp://192.168.1.1/image.elf" ; is equal to ; "flash prog image.elf" ; ; In a Flash Profile: ; FILE="tftp://192.168.1.1/image.bin", BIN, 0 ; is equal to ; FILE="image.bin", BIN, 0 ; ;CORE0_PATH = "tftp://192.168.3.60" CORE0_PATH = "card:" CORE0_FILE = "test.bin", BIN, 0x20000000 [INIT_RA2L1] ; Note: ; At 0x400 - 0x43F ate located option registers. ; When option registers are programmed with wrong values, than a ; debug connection is not possible in single chip boot mode (BM=1) ; Use SCI boot mode (BM=0) to erase the flash ; [FLASH_RA] CHIP = RENESAS_RA_LP FILE = "test32k.bin", 0x38000 ; file to program [SERIAL] BAUD = 115200 STOP_BITS = 1 PARITY = NONE TCP_PORT = 0 [TELNET] PROMPT = "ra2l1> " ; telnet prompt [DISPLAY] BRIGHTNESS = 20 ; LED indicator brightness VOLUME = 25 ; beeper volume [ACTIONS] ; user defined scripts ;AUTORUN = 2 ; executed on every target connect 1 = erase 2 = prog [erase] ; erase flash flash erase [prog] ; program flash flash prog [rtt] gm 0 rtt setup 0x20000000 1024*8 rtt start rtt server_start 2001 0